The storage device interfaces are demanded with more versatility, larger capability and higher data transfer rate. For example, the serial ATA (SATA) interface is developed to provide higher transfer rate (about Gbps) over conventional parallel ATA interface.
FIG. 1 shows a prior art serial ATA control circuit, which comprises a first serial ATA controller 12 and a second serial ATA controller 14. The first serial ATA controller 12 comprises a first memory accessing controller 121, a first transceiver 123 and a second transceiver 125. The second serial ATA controller 14 comprises a second memory accessing controller 141, a third transceiver 143 and a fourth transceiver 145. The first transceiver 123, the second transceiver 125, the third transceiver 143 and the fourth transceiver 145 are connected to serial devices through a first port 127, a second port 129, a third port 147 and a fourth port 149, respectively.
The conventional serial ATA connectors generally have identical appearance, which will hinder the user to identify the connectors being connected to the same serial ATA controller or not. Occasionally, two serial ATA devices are connected to two ports with associated transceivers belonging to the same serial ATA controller. In this situation, the two serial ATA devices can not access data at the same time because one serial ATA device is set to be master and another serial ATA device is set to be slave.